Modern integrated circuits, such as monolithic semiconductor devices formed of materials such as group IV materials like silicon and germanium and group III-IV materials such as gallium arsenide, and combinations of such materials, are typically comprised of millions of transistor devices. The transistor devices vary in many different aspects, but generally have a channel disposed between a source region and drain region, with a gate electrode disposed over the channel. The channel and the gate are separated by a relatively thin layer of a non electrically conductive material, commonly called the gate insulation layer.
Silicon dioxide has typically been used as the dielectric material between the electrically conductive gate electrode, often formed of polysilicon, and the semiconducting channel of the transistor. Silicon dioxide has provided adequately high capacitance for gate insulation in the past, with devices having gate geometries of about 130 nanometers and greater.
Current transistor geometries use a gate insulation layer of silicon dioxide that is about ten to about thirty angstroms thick, or the thickness of about five to about twenty individual silicon atoms. The silicon dioxide layer gates the electrons through the channel, controlling the flow of electricity across the transistor. However, when the transistor is reduced in size, the silicon dioxide gate insulation layer is also proportionally thinned. As gate lengths decrease from one hundred and thirty nanometers to ninety, sixty-five, and even thirty nanometers, the thickness of the silicon oxide gate will be reduced to less than ten angstroms, or to about three monolayers.
Unfortunately, as the gate insulation layer is reduced to less than about twenty angstroms, the silicon dioxide tends to have difficulty in providing effective insulation from the effects of quantum tunneling currents, and the transistor tends to exhibit relatively high leakage. Thus, current leakage is a major concern in ultra-thin dielectric gates used in the transistor devices of integrated circuits.
The existing methods of measuring current leakage in gates are performed on non production substrates, or in other words, substrates which do not include integrated circuits intended for sale. These methods typically cannot be performed on production substrates, because they require a relatively large surface area of the gate material in order to test the leakage, and modern integrated circuits use gates that are smaller than the area required by the test methods. Thus, such tests are typically performed on layers of the gate insulation material that are formed into special, larger test structures, which are disposed on special test substrate. While such test structures could be formed on standard production substrates, they would tend to require a lot of surface area that could otherwise be used for production integrated circuits.
One method of testing leakage current is accomplished by using a contact probe and a current-voltage method, which is destructive to the structure being tested. Thus, not only is a relatively large gate layer required, but the gate layer is damaged by the test. Another method of testing current leakage is a corona oxide characterization of semiconductor, which is a non-contact method that deposits a charge on the gate dielectric and measures with a close proximity probe tip the decay in the surface voltage over time. This method also requires a relatively large test area, and thus is used on non production substrates only.
Therefore, there are many disadvantages to the old methods, including the destructive nature of the contact measurement method, and the relatively large spot size which reduces the ability of the methods to take readings on small gate dielectrics, and which therefore limits the traditional measurement methods to only non production substrates and structures.
What is needed, therefore, is a method of measuring current leakage that overcomes or reduces some of these or other problems.